Jonah “Kalani” Wengler was born and raised in Wailupe O’ahu and graduated from Kamehameha Schools. He is currently a senior at the University of Hawaii at M?noa majoring in Mechanical Engineering. Jonah recently participated in First Nations Launch (FNL) for the first time, where he and his team launched a level two high powered rocket nearly 4100 ft high. His career goal is to “have a seat at the table” or be in decision making positions in the advancement of the Hawaiian people.
Home Island: Oahu
Institution when accepted: University of Hawai‘i at M?noa: College of Engineering
Akamai Project: Cooling & Reducing Thermocycling of YT Lee Array Field Programmable Gate Arrays
Project Site: Academia Sinica Institute of Astronomy & Astrophysics (ASIAA)
Mentors: Ranjani Srinivasan, Derek Kubo & Peter Oshiro
The Yuan-Tseh Lee Array (YTLA) Radio Telescope’s current method of digitizing and processing data includes a chassis called a R.O.A.C.H. (Reconfigurable Open Architecture Computing Hardware), which houses the electronics. The primary processing chip is a Field Programmable Gate Array (FPGA). However, these chips, with their current cooling method, tend to exceed their operating temperatures during the warmest parts of the day, which could lead to chip failure. The purpose of this Akamai project is to design a cooling system that will not only keep the FPGAs within their operating range, but also maintain them at a relatively stable temperature (+/- 5 ?C). There are industrial solutions to this issue; however, because of budget and/or time constraints, they could not be implemented. Thermal analysis done in SolidWorks suggested that a perforated cover design would sufficiently vent the heat from the R.O.A.C.H. into an enclosed bay in which they are located. Stabilization of the temperature of the bay also needed to be done in order to reduce thermal cycling during the day. This was accomplished by incorporating both door fans and internal rack mounted fans into the design, that would operate during the day and be turned off at night. After installing the first perforated cover on site, the temperature of the FPGA chip decreased by ~10?C. Results of simulations done in SolidWorks with different CFM (ft3/min) values to determine the most suitable fan will be presented. Once the fans are installed, empirical tests would be required to determine the speed and duration of their operation to optimize the cooling efficiency.